EDN

From timing to power: the shift in modeling standards

There's been a shift in what's needed in modeling standards for IC design. The focus has moved from timing to power consumption. Timing modeling, which dominated much of the effort from the early to ...
Semiconductor Engineering

Writing Reusable UPF For RTL And Gate-Level Low Power Verification

The Unified Power Format (UPF) is used to specify the power intent of a design. Once written, the UPF file is applied at every stage of the design cycle — starting with the RTL, then the gate-level, ...