IEEE

A 7.4–9.2-GHz Fractional-N Differential Sampling PLL Based on Phase-Domain and Voltage-Domain Hybrid Calibration

Abstract: This brief proposes a 7.4–9.2-GHz low-noise fractional-N differential sampling phase-locked loop (DSPLL), which features doubled phase detector (PD) gain. By using the phase-domain and ...
IEEE

A Sub-Sampling Fast Lock Detector for Fractional-N PLL

Abstract: In this paper, a sub-sampling lock detector is proposed to detect the lock or out-of-lock state for fractional-N phase-locked loop (PLL) in various applications, such as the generation of ...