IEEE

Power-aware optimization of software-based self-test for L1 caches in microprocessors

Abstract: In the era of terascale integration, the “reliability wall” and the “power wall” arise as barriers imposing significant challenges to the microprocessor industry. Nowadays, on-line testing ...
IEEE

Evaluation of Indium Thermal Interface Material (TIM) Cross-Sectioning Methods on Lidded High-Performance Microprocessors

Abstract: Voids, cracks, and insufficient TIM volume hinder heat dissipation and jeopardize reliability of lidded high-performance microprocessors. Non-destructive tests can effectively inspect ...
IEEE

A 57.2GHz 11.2mW 8-bit General Purpose Superconductor Microprocessor with Dual-Clocking Scheme

Abstract: A superconductor single-flux-quantum (SFQ) logic 8-bit microprocessor is demonstrated up to 57.2 GHz with a measured power consumption of 11.2 mW. The microprocessor has an ultradeep, ...
IEEE

A Heterogeneous Microprocessor for Intermittent AI Inference Using Nonvolatile-SRAM-Based Compute-In-Memory

Abstract: Compute-In-Memory (CIM), characterized by efficient matrix-vector multiplication, has been recognized as a promising candidate technology for edge AI computing. However, applying CIM in ...
IEEE

Trade-offs and Optimization: Low Power Approaches for Area, Power Consumption, and Performance in Microprocessor Design

Abstract: This research paper presents the findings of implementing low-power techniques on RISC V microprocessors using 90 nm technology. The power consumption of smaller microprocessors is a concern ...
IEEE

Prior-Boosted GRL: Microarchitecture Design Space Exploration via Graph Representation Learning

Abstract: The design space exploration (DSE) of contemporary microprocessors faces a significant challenge of high-computational cost. In this context, we introduce Prior-boosted graph representation ...