GitHub

ADC implemetation on supported platforms?

Could you please add e.g. a reference in the README.md of the ADC example or so ... in regard of implementation status for each platform and your plan / schedule to finish it? Example - a chart that ...
Nature

An improved dynamic programming algorithm by integrating discrete differential and successive approximation for real time control of urban drainage systems

The Nature Index 2025 Research Leaders — previously known as Annual Tables — reveal the leading institutions and countries/territories in the natural and health sciences, according to their output in ...
Nature

Noise-Shaping Successive Approximation Register Analog-to-Digital Converters

The noise‐shaping successive approximation register (NS‐SAR) analogue‐to‐digital converter represents an attractive hybrid architecture that merges the inherent energy efficiency and simplicity of ...
IEEE

A 5-MS/s 16-bit Low-Noise and Low-Power Split Sampling SAR ADC With Eased Driving Burden

Abstract: This article presents a 16-bit 5-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) with the proposed split sampling (SS) technique. The SS decouples the sampling ...
Business Wire

Analog Devices’ New Easy Drive™ SAR ADCs Simplify Design While Delivering Industry Leading Performance

WILMINGTON, Mass.--(BUSINESS WIRE)--Analog Devices, Inc. (Nasdaq: ADI) today introduced a new portfolio of next-generation 16-to-24-bit, ultra-high precision successive approximation register (SAR) ...
EDN

Challenges & Requirements: Voltage Reference Design for Precision Successive-Approximation ADCs, Part 1

Editor's note: We will publish this article in four sequential parts leading up to our “Ask the experts” session on Precision Voltage References on May 21. Alan Walsh will be one of our experts. The ...
IEEE

Jittered random sampling with a successive approximation ADC

Abstract: This paper proposes a randomly jittered temporal sampling scheme with a successive approximation register (SAR) ADC. The sampling time points are jittered around a uniform sampling clock. A ...
EDN

“Golden Gloves” A/D Converter Match, Round 2: Successive-approximation register vs. sigma-delta topology–Power Efficiency

After the seven-round fight back in April 2010 between the successive-approximation register (SAR) analog/digital converter (ADC) and the sigma-delta (S?) ADC, Figure 1, (click here to see the full ...